__Inverter – Voltage Transfer Characteristic__
Voltage Transfer Characteristic (VTC) for logic inverters have been standardized.

VTC is the graph between Vout and VIN. On vertical
axis, VOH and VOL correspond to output high and

output low voltage levels respectively. On the
horizontal axis, VIL is input low voltage and VIH is the input high voltage.

__Inverter – Voltage Transfer Characteristic__
As the input voltage is increased from 0V, VIL is
the maximum input voltage that provides a high output voltage (logical 1
output).

VIH is the minimum input voltage that provides a low
output voltage (logical 0 output). VOH, VOL, VIL and VIH are referred to as the
critical voltages of the VTC.

VOH > VIH

VOL < VIL

__Midpoint Voltage:__
Sometimes referred as Threshold voltage (Vth).

The voltage at which Vout = VIN on VTC is referred
as Midpoint voltage. Midpoint voltage can be found graphically by superimposing
(the unity slope) Vout = VIN and finding its intersection with the VTC

__Logic Swing and Transition Width__

__Logic Swing__
The magnitude of voltage difference between the
output high and low voltage levels.

VLS = VOH – VOL

__Transition Width__
The amount of voltage change that is required of the
input voltage to cause a change in the output voltage from the high to the low
level (and vice versa).

VTW = VIH - VIL

__Noise in Digital Circuits__

__Noise__
Variations in the steady-state voltage levels of
digital circuits (i.e. Logical 1 and logical 0 states) are undesirable and
cause logic errors. This variation is termed as Noise.

__Noise Margins__
Voltage Noise Margin represents the safety margin for
the high and low voltage levels. Noise voltages must have magnitudes less than
the voltage noise margins.

VNMH = VOH – VIH

VNML = VIL - VOL

__Noise Sensitivities__
The effects of input variations are quantified in
terms of the noise sensitivities.

The high noise sensitivity is defined as the
difference between input and midpoint voltage for VIN at VOH.

The low noise sensitivity is defined as the
difference between input and midpoint voltage for VIN at VOL.

VNSH = VOH – VM

VNSL = VM - VOL

__Noise Immunities__
The ability of a gate to reject noise. The high and
low noise immunities are defined as the quotient of the noise sensitivities and
the logic swing.

VNIH = VNSH / VLS

VNIL = VNSL / VLS

__FAN-IN and FAN-OUT__
A general logic gate has multiple inputs and
multiple outputs.

By multiple outputs we mean the output of a given
gate is connected to (driving) the inputs of several load gates.

FAN-IN: the number of inputs of a gate.

FAN-OUT: the number of outputs of a gate.

Maximum FAN-OUT depends on the input and output
current of a driving gate.

The maximum fan-out possible during the driving
gate’s logical 1 output state is

Nhigh = IOUT (high)/ I’IN (high)

The maximum fan-out possible during the driving
gate’s logical 0 output state is

Nlow = IOUT (low)/ I’IN (low)

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