Showing posts from December, 2014

Modeling Of Finite State Machines

A designer should consider the different aspects of an FSM before attempting to write a model. A well-written model is essential for a functionality correct circuit that meets requirements in the most optimal manner. A badly written model may not meet either criteria. For this reason, it is important to fully understand FSMs and to be familiar with the different HDL modeling issues. The Finite State Machine A FSM is any circuit specifically designed to sequence through specific patterns of states in a predetermined sequential manner, and which conforms to the structure shown in fig below. A state is represented by the binary value held on the current register. The FSM structure consists of three parts and may, or may not, be reflected in the structure of them HDL code that is used to model it.   The State Table and State Diagram A state diagram is a graphical representation of a state machine’s sequential operation and is often supported as a direct input to co